The new project will scale up NASA's technology and manufacturing process to a modern wafer size and democratize SiC chip design. Along with NASA, collaborators include GE Aerospace Research in ...

However, semiconductors made from high-quality SiC wafers are required to maximize ... much of the research and development for the manufacturing process has occurred at the company’s facility ...

South Korean researchers have developed a process to produce ultra-thin wafers without sacrificing any of the substrates. Their technique is based on a new approach involving the use of plasma ...

TL;DR: Intel announced Lip-Bu Tan as CEO and achieved a milestone by testing its 18A process node wafers at its Arizona fab, marking a significant step for U.S. semiconductor manufacturing.

It is due to start volume production of 8” SiC ICs in Q4 using ST’s SiC process technology ... build and operate an 8-inch SiC substrate manufacturing facility which will supply wafers to the JV under ...