For multi-part packages, like many logic gates, the schematic symbols need to be broken apart, since you rarely use them all in one place in your schematic. ... Figure 3 OrCAD 9 would allow the ...

The NAND gate is a circuit that outputs '0' when both inputs are '1', and '0' otherwise, so if you arrange the NAND gate as follows, the Invert circuit is completed.

The schematic from the very first test shows the slight modifications [Dr. Cockroach] made to incorporate light into the logic gate using a 910 Ohm, output LED, and an LED and LDR in parallel.

Similarly, when a high voltage (15V) is applied at the gate terminal, the MOSFET operates in the saturated mode, and a low impedance is present between the drain and source terminals of the MOSFET.