The IC final test is directly completed on the entire packaging wafer before the packaging wafer is cut into single die. This complete testing of the whole wafer before dicing can greatly improve the ...

SK hynix to reportedly change wafer cutting for its next-gen HBM4 memory and 400-layer NAND flash, as they're becoming ...

Defect detection requirements on the order of 10 defective parts per million (DPPM) are driving improvements in inspection ...

Kurt Sievers, the CEO of Dutch semiconductor giant NXP Semiconductors, who is set to officially step down at the end of ...

With today's chips packing more power into smaller footprints, getting them from fab to factory now demands a new level of ...

Innoscience, a leading Chinese GaN specialist, plans to expand its monthly production of 8-inch (200mm) wafers from 13,000 to ...