Signal integrity is the art of getting a signal from point A to point B with minimum distortion to that signal. The recent attention on this subject stems from the necessity to build systems with ever ...

Among many deliberations when designing with high-speed analog-to-digital converters (ADCs), the effect of the ADC’s sampling clock is paramount to meeting specific design requirements. There are ...

In the case of a clock signal, these events can be adjacent positive-going edges. By using counters or pattern triggering, the same bit in a complex pattern can be repeatedly measured and the values ...

High-performance computing (HPC) applications require IC designs with maximum performance. However, as process technology advances, achieving high performance has become increasingly challenging.

There are significantly different architectures for what are known as “atomic” clocks. Optically driven atomic clocks offer a new set of performance attributes. The optical atomic clocks use paired ...

At a logical level, synchronous designs are very simple and the clock just happens. But the clocking network is possibly the most complex in a chip, and it’s fraught with the most problems at the ...