EDN

64 Bit Synchronous CAM using CMOS 45 nm Technology

• Designed a 64 bit (8×8) Synchronous CAM in CMOS 45nm Technology using the Cadence® Virtuoso and Synopsys® HSPICE environments. • Implemented a complete layout of the design using the Cadence® Design ...
EDN

64 bit Synchronous CAM Design

Collaborated with 2 team members and designed a 2 GHz, 8*8 Content Addressable Memory (CAM) in 45nm CMOS process. Implemented the complete physical layout of the circuit using Cadence Design Framework ...