EDN

TSMC Unveils IC Design Flow For 0.25-, 0.18-Micron Processes

Taiwan Semiconductor Manufacturing Co. (TSMC) today released what it believes is the first manufacturability-focused IC design flow that is silicon-proven in its 0.25-micron and 0.18-micron ...
EDN

UMC certifies Cadence 3D-IC reference flow

Speeding time to market, the Cadence 3D-IC reference flow, featuring the Integrity 3D-IC platform, has been certified for UMC’s chip stacking technologies. UMC’s hybrid bonding solutions support the ...
Business Wire

UMC and Cadence Collaborate on 3D-IC Hybrid Bonding Reference Flow

HSINCHU, Taiwan & SAN JOSE, Calif.--(BUSINESS WIRE)--United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (“UMC”), a leading global semiconductor foundry, and Cadence Design Systems, Inc.
Semiconductor Engineering

Research on Wire Sweep of Integrated Circuit Packaging Based on Three-dimensional Flow Simulation

“Semiconductor manufacturing technology is becoming more and more rapidly. In the process of Integrated Circuit (IC) encapsulation, when wires contact each other, it will cause short circuit. Wire ...